These tutorials describe the use of Altera® FPGA technology in various design flows. Most of this material is meant to support laboratory experiments like the ones presented in Courses. You can select a specific version of the tutorials below. Tutorial version numbers are synchronized to versions of the Altera® Quartus® Prime software.

Learn how to design logic circuits using the Altera® Quartus® software, and how to implements these circuits in the Altera FPGA devices featured on the Terasic DE-Series boards.

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Learn how to simulate the functionality of your Verilog and VHDL code with ModelSim* and/or DESim, how to apply timing constraints to your logic circuits in the Quartus® Prime software, and how to perform in-circuit debugging by using Signal Tap.

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Learn about the ARM Cortex-A9 processor that is included in Altera SoC FPGAs, and/or the Nios soft processor. A link is provided to the documentation for the CPUlator, which is an excellent web-based simulator/emulator for the development of assembly and C code that can run on DE-series boards. Tutorials also introduce the Monitor Program that is used to develop both assembly language and C code, the Platform Designer tool that is used to create computer systems in Altera FPGAs, and other topics.

Learn how to use many of the complex input/output devices on DE-series boards.

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Learn how to use embedded Linux with the ARM processor on the DE1-SoC, DE10-Standard, or DE10-Nano boards.

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Learn about advanced Altera® technology for accelerating computations with Altera FPGAs.

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